1. Field of the Invention
The present invention relates generally to an image sensor device and, more particularly, to a CMOS image sensor (CIS) device and a fabrication method thereof.
2. Description of the Prior Art
CMOS image sensors are known in the art. A CMOS image sensor typically includes active components, such as transistors, which are associated with each pixel. Because of the compatibility with the CMOS process, an advantage is the ability to integrate signal processing circuit and sensing circuit within a single chip.
A CMOS image sensor unit is generally composed of several transistors and a photodiode. Incident light is divided into light of different wavelengths, such as red, blue, and green, and received by the photodiode in semiconductor substrate, which is then converted into electrical signals.
FIG. 1 is a schematic, cross-sectional view of a prior art CMOS image sensor. As shown in FIG. 1, the prior art CMOS image sensor includes a semiconductor substrate 10. A plurality of photosensor elements 110 is provided within an active array region 101 on the semiconductor substrate 10. A first dielectric layer 12, a second dielectric layer 14, and a third dielectric layer 16 are deposited on the semiconductor substrate 10. The first dielectric layer 12 covers the photosensor elements 110 in the active array region 101 and transistors 120 in the peripheral circuit region 102. The second dielectric layer 14 covers the metal interconnection layer 140 on the first dielectric layer 12. The third dielectric layer 16 covers the metal interconnection layer 160 on the second dielectric layer 14.
In order to reduce the light loss, after the deposition of the third dielectric layer 16, a photoresist pattern 18 is typically formed on the third dielectric layer 16. A so-called “canyon etching” process is then carried out to etch the exposed third dielectric layer 16 within the active array region 101 to a pre-selected depth through the opening 18a of the photoresist pattern 18. The “canyon etching” process does not etch through the entire thickness of the third dielectric layer 16 and the underlying second dielectric layer 14 is not exposed. After the “canyon etching” process, a recess region 21 is formed in the third dielectric layer 16, which is directly situated above the active area region 101.
However, the above-described prior art has some drawbacks. For example, due to the loading effect during the “canyon etching” process, an angle θ1 between the sidewall 21a and the bottom 21b of the recess region 21 is typically greater than 90 degrees, as indicated by the broken line circle 20. Before light incident into the photosensor element 110a that is situated near the perimeter of the active array region 101, it passes through a thicker third dielectric layer 16 than light passing through the center of the active array region 101. This results in significant brightness difference between the center and four corners of an image.